combinational logic
英
美
网络 组合逻辑; 逻辑模块; 組合邏輯; 组合逻辑电路; 组合电路
双语例句
- A decomposition method for simplifying combinational logic design based on Boolean equation
一个基于布尔方程的简化组合逻辑设计的分解方法 - Multiplexer is a kind of combinational logic circuit, which can be selected an in-put datum among several data and sent it to out-put port.
数据选择器是一种能从多个输入数据中有选择地将一个输入数据送到输出端的组合逻辑电路。 - A combinational logic element having at least one input channel.
一种至少有一个输入通道的组合逻辑元件。 - If the combinational logic circuit is only one output, called the single-output combinational logic circuit;
如果组合逻辑电路只有一个输出，称为单输出组合逻辑电路； - Through examples it proves that the optimal method of the combinational logic based on the rough set is both feasible and effective.
本文阐述了组合逻辑电路无反变量输入的设计思想，并通过设计实例给出了具体的设计方法与步骤。 - An Automated Soft Error Rate Analysis Platform for Combinational Logic Circuits
组合逻辑电路的软错误率自动分析平台 - The method of judge and remove in the phenomenon of race and hazard of the combinational logic circuit
组合逻辑电路中的竞争冒险现象的判断和消除 - Some deterministic relations and methods about the signature testability for combinational logic circuits are obtained.
并由此得到一些组合逻辑电路特征量可测试性的确定性关系和方法。 - Application of duality principle in designing of combinational logic circuit
对偶原理在组合逻辑电路设计中的应用 - The Application of Data Selector in the Combinational Logic Circuit
数据选择器在组合逻辑电路中的应用 - Combinational Logic and Clocking Schemes in FPGA Design
FPGA设计中的组合逻辑与时钟方案 - This paper presented and expounded the principle and way of design in combinational logic circuit based on exclusive-OR gate, pointed out the applicability of this way and the superiority in the optimization of logic design and improvement of circuit function in combination with concrete living examples.
提出井阐述了以异或门为基础的组合逻辑电路的设计原理和设计方法，结合具体实例，指明了谊方法的适用范围，以及在优化逻辑设计、提高电路性能方面的优越性。 - The realization of a combinational logic circuit simulation platform with Applet technology of Java 2 is introduced in this paper.
介绍了以Java2标准中的Applet技术开发组合逻辑电路网络仿真实验平台的原理。 - In this paper a new algorithm for diagnosis of combinational logic networks is proposed.
本文提出诊断组合逻辑网络的一种新算法。 - Automatic synthesize is an important work in design of complicated combinational logic circuits.
自动逻辑综合是复杂组合电路设计中必须面对的问题之一。 - Study on Chaos Control and Chaotic Optimization with Its Applications in Test Generation for Combinational Logic Circuits
混沌控制与混沌优化及其在组合电路测试生成中的应用研究 - This paper briefly introduces the basic method of transforming data selector into combinational logic circuit of other functions.
简述了用数据选择器转换为其它功能组合逻辑电路的基本方法。 - Experimental results for 16 combinational logic operation in an 8f coherent optical processing system are shown.
也给出了在8f相干光学处理系统中执行的16种复合逻辑运算的结果。 - Here, standard units include basic gate circuits, flip-flops and other basic combinational logic circuits.
在这里，标准单元是指基本的门电路，触发器或其他基本组合逻辑电路。 - A Study of the Implication and the Input of LSI Combinational Logic Circuit
大规模组合逻辑集成电路蕴含与输入的研究 - Backward Analysis and Conditional Path Method for Combinational Logic Circuits
组合逻辑电路的逆向分析和条件通路法 - Research and Realization of Combinational Logic Synthesis in VHDL High-Level Synthesis System
VHDL高级综合系统中组合逻辑综合的研究与实现 - ECL-ULG combinational logic and sequential logic are also introduced.
对于ECL-ULG的组合逻辑和时序逻辑在文中也作了简单介绍。 - The design of combinational logic circuits is one of the most important aspects in the digital circuit design.
组合逻辑电路的设计是数字电路设计中的重要研究方向之一。 - Based on this mixed-mode simulation method, we implement a soft error rate analysis tool for combinational logic.
并基于该SET脉冲传播算法，实现了组合电路软错误率分析工具。 - The graph encoding can represent any combinational logic circuits and mapping rules from graph to circuit are very simple.
图编码可以表示任何结构的组合逻辑电路，并且从图编码到电路图的映射规则将非常简单。 - Fault diagnosis of the control circuit is researched, and some relative diagnosis ways are given for the test of a few fault phenomena of the combinational logic circuit and the sequential circuit.
通过对控制电路系统故障诊断的研究，对组合逻辑电路的多种故障现象以及时序逻辑电路给出了对应的测试与诊断方法，并提出了控制系统对转子中心位置的搜索方法。 - The test pattern generation algorithms for combinational logic circuit and the fault types were discussed.
讨论了组合逻辑电路的故障诊断的方法，故障的类型。 - To solve the problem of long combinational logic path in the process of address calculating, we adopt finite state machine to realize the control logic of transmission.
为了解决DMA控制器计算地址过程中组合逻辑路径过长的技术难题。在设计中，采用了有限状态机的设计思路，实现了对传输逻辑的控制。 - In this method, we propose the graph encoding to represent combinational logic circuits.
在这种方法中，我们提出了一种全新的图编码来表示组合逻辑电路。